RomulusRemus

Compute Power This appears to be Google's own board designed to showcase their Google Edge Tensor Processing Unit co-processor (rated at 4 TOPS).   It has a 64bit quad core ARM processor.  It also has 2GB of RAM so far more space to load models in than most other micro-controllers.  This board is more akin to a customised Raspberry pi and it comes pre-loaded with their own "Mendel Linux" (presumably within the on-board 8Gb of eMMC flash). Here is the vendor specification Aside from the TPU the board also has an on board security chip (A71CH) which appears to be for securing the private keys needed for hosting HTTPS or ssh connections. Listed peripherals include a camera - to provide images for it to recognise I assume. Here is the link to the PiHut buying page where it is about £125 Robotics Facilities Regarding robotics here is a system block diagram followed by the GPIO pinout specification ... plenty of scope for attaching motors, servos, sensors etc.   Todo...

Why this page  This is to evaluate whether the Portenta H7 could be used as part of this project, and if so, what the limitations of the board would be. Vendor Documentation Here is the  Vendors product description Here is the Vendors datasheet (pdf) Architectural Summary CPUs This board has two 32-bit ARM cores with 8Mb of RAM and 16Mb of flash memory (program store) shared between the processors.   The two cores have different architectures, one being a Cortex-M4 and the other a Cortex-M7 with roughly double the performance.  Presumably, for a users application, the ARM Mbed real time OS is used to specify which core performs which task. Graphics Accelerators This board has a Graphics Processing Unit (called "Chrom-ART Accelerator") presumably to drive the on board Display Port interface.  The vendors also list a "a dedicated JPEG encoder and decoder" presumably to assist in image recognition and image forwarding applications. Security Module The on boar...

 This blog is to capture the computer architecture required to implement co-operative and adversarial agents. It is anticipated this will cover various high level techniques such as reinforcement learning and neural networks, but will then map the high level models to lower level compute resources such as single board computers, robot controllers etc. Rather than being a definitive plan, the blog will be discursive in tone, and will cover alternative approaches.  Ultimately the blog will be used to inform discussion of the final architecture which will probably be documented elsewhere.